1. Field of the Invention
The present invention relates to a circuit and a method for controlling a write recovery time in a semiconductor memory device, and more particularly to a circuit and a method capable of reducing current consumption and noise that are generated during a write recovery time.
2. Description of the Related Art
In synchronous semiconductor memory devices, such as synchronous dynamic random-access memory (SDRAM), double data rate (DDR) SDRAM, DDR2 SDRAM, DDR3 SDRAM, etc., an automatic precharge write operation mode is performed so as to achieve high speed operation. In order to precharge a bit line so as to perform a following command after a write operation, the automatic precharge write operation mode does not receive a new precharge command from the exterior of the device, but automatically generates a precharge command inside of the device when a write command is inputted.
Since a precharge operation needs to be performed after write data is stably written in a memory cell, a minimal write recovery time (tWR) needs to be guaranteed from a point in time when the last data is written to a point in time when the precharge operation begins.
In Korean Patent No. 503850 (U.S. Pat. No. 6,434,082), a technology including a programming mechanism for setting a tWR as a function of an input clock is disclosed. In Korean Patent No. 533696, a technology capable of sufficiently providing a voltage for the last write data of a memory cell array during a tWR is disclosed. In Korean Patent Laid-Open Publication No. 2005-41580 (U.S. 2005-0099837), a technology for controlling an automatic precharge timing in response to a column address strobe (CAS) latency control signal, so as to control a tWR according to a frequency of an operation clock, is disclosed.
In order to control a tWR, a control signal for the tWR is generated, and a clock is counted in response to the control signal for the tWR to calculate a point in time when the precharge operation begins, wherein the control signal for the tWR is activated from a point in time when a write command is inputted and deactivated at a point in time when an automatic precharge operation is performed.
Therefore, the counting operation is performed for an unnecessarily long time, and a lot of switching current is consumed in a clock toggle operation by the counting operation. In addition, a high-speed switching operation may be a source of noise.